mcs 012 solved assignment 2017-18

MCS-012 

Computer Organisation and Assembly Language Programming 

There are four questions in this assignment, which carries 80 marks. Rest 20 marks are for viva voce. You may use illustrations and diagrams to enhance the explanations. Please go through the guidelines regarding assignments given in the Programme Guide for the format of presentation. Answer to each part of the question should be confined to about 300 words. Make suitable assumption, if any.

Question-1                                                (Covers Block 1)
(a) What are the differences between signed 1’s complement notation and signed 2’s complement notation for representation of negative fixed point numbers? Find the range of numbers that can be represented in both these notations, if the size of the notation is 8 bits (including sign bit).
Explain the difference in the range of the two notations. Perform the following arithmetic operations using signed 2’s complement 8-bit representation. (Please note that the numbers given below are in decimal notation)
 i) Subtract 30 from –98
ii) Add 69 and 59 Please indicate the overflow if it occurs.
How have you identified the overflow?

(b) Perform the following conversion of numbers:
i) Decimal (9999)10 to binary and hexadecimal
ii) Hexadecimal (FEDC9410)H into Octal.
iii) ASCII string “MCS-012Course” into UTF 8
 iv) Octal (234567)O into Decimal

(c) Design a circuit for the following function: F(A, B, C, D) = Σ (0, 1,2, 4, 5, 6, 9, 11, 15) Draw the truth table. Use the Karnaugh's map to design the circuit and draw it using AND, OR and NOT gates.

(d) Why is Single Error Correcting (SEC) needed in a computer? What will be length of SEC code for transfer of 16 bit data? A 4 bit data 1011 on transmission is received as 1001, show how the SEC code will detect and correct this error.

(e) Design a two bit counter (a sequential circuit). The counter states are 00, 01, 10, 11, 00, 01, 10, 11, 00…You should show the state table, state diagram, the k-map for circuit design and logic diagram of the resultant design using D flip-flop or J-K flip flop.

(f) What is floating point number? How is it different to fixed point number? Represent (+678.001)10 and (-0.00000125)10 in IEEE 754 double precision floating point number format.

Question-2                                             (Covers Block 2)

(a) A machine has 32 bit address bus. Its registers are also of 32 bits. The memory of this machine has a word size of 16 bits.

(i) How many data input and output lines does this RAM need? Explain your answer.

(ii) What is the maximum size of RAM that can be supported by this machine? Give reason in support of your answer.

(b) A computer has 1 MB RAM and has a word size of 8 bits. It has cache memory having 16 blocks with a block size of 32 bits. Show how the main memory address 10001111101001011101 will be mapped to cache address, if
 (i) Direct cache mapping is used
(ii) Associative cache mapping is used
 (iii)Two way set associative cache mapping is used.

(c) Differentiate among the three I/O techniques (Programmed I/O, Interrupt driven I/O and DMA). A simple computer is to be designed which can process request of a single user, which of the three I/O techniques is most suitable for this computer? Justify your answer.

(d) A disk having 1280 tracks, each track having 128 sectors with each sector is of size 1M bits. A file having name mcs012assign.txt is of size 22M bits. Assume that disk has three free - continuous clusters of 8 sectors each. How can this file be given the space on the disk? Show the content of FAT after the space allocation to the file. You may make suitable assumptions. You may assume the cluster size as 4 sectors, if needed.

(e) Explain the following giving their uses and advantages/disadvantages. (Word limit for answer of each part is 50 words ONLY)
1) CD-R
2) LCD Monitor
3) Laser Printer
4) Graphics card
5) Small Computer System Interface
6) Cortana software

Question-3                                     (Covers Block 3)
(a) A computer has a single core processor having 16 General purpose registers and 16 additional special purpose registers. The machine has 1 MB RAM. The size of each register and memory word is 32 bits each. An instruction of the machine is of fixed length and is equal to the memory word. Each instruction of the machine has two operands – one memory and second register operand. Memory operand is a direct operand; however, register operand can be direct or indirect. In case register operand is an indirect operand, the stated register contains the address of a memory location. The instruction of the machine consists of operation code bits, One addressing mode bit and one register operand and one memory operand. The addressing mode bit specifies addressing mode as: Addressing mode bit Register Operand Memory Operand 0 Direct Direct 1 Indirect Direct Six of the special purpose registers perform the task as Program Counter (PC), Accumulator (AC), Memory Address Register (MAR), Instruction Register (IR), Data Register (DR) and Flag registers (FR). Perform the following tasks for the machine.
(i) Design suitable instruction formats for the machine. Specify the size of different fields that are needed in the instruction format. Also indicate how many different operations can be coded for this machine. Give reasons in support of your answer.
(ii) Put some valid values in certain registers and memory locations and demonstrate examples of different addressing modes of this machine.
 (iii) Assuming that the instructions are first fetched to Instruction Register (IR) and memory operands is brought to DR register; indirect operand is brought to AC; and result of operation is stored in the AC register; write and explain the sequence of micro-operations that are required for fetch and execute cycles of an ADD instruction having addressing mode bit as 1. Make and state suitable assumptions, if any.

(b) Assume that you have a machine as shown in section 3.2.2 of Block 3 having the micro-operations as given in Figure 10 on page 62 of Block 3. Consider that R1 and R2 both are 8 bit registers and contains 01001010 and 11100111 respectively. What will be the values of select inputs, carry-in input and result of operation (including carry out bit) if the following microoperations are performed? (For each micro-operation you may assume the initial value of R1 and R2 as given above)

(i) Subtract R2 from R1

(ii) AND of R1 and R2

(iii) Shift Right R1 twice

(iv) Decrement R1

(c) Explain the functioning of Wilkes Control Unit with the help of a diagram. What is meant by micro-programmed control Unit?

 (d) What are the characteristics of a RISC machine? Also explain the pipelining concept in a RISC machine?

 (e) A RISC machine has 62 registers out of which 8 registers are reserved for the Global variables and 24 for Instruction related tasks. This machine has been designed to have 6 registers for storing two input parameters, two output parameters and two local variables for function call. Explain with the help of a diagram, how the overlapped register window can be implemented in this machine for function/procedure calls. You must explain how the parameters will be passed when a function calls another function.

 Question-4                                      (Covers Block 4)

(a) Write a program in 8086 assembly Language (with proper comments) that accepts four characters entered using the keyboard. It checks if all these characters are alphabets. The program then converts all the characters of the string into equivalent upper case alphabets. These uppercase alphabets are then shown as output. Make suitable assumptions, if any.

(b) Write a program in 8086 assembly Language (with proper comments) that passes a byte containing two packed BCD digits, as parameter to a near procedure named TOBINARY, which converts the packed BCD digits to equivalent binary number. This binary number is returned to the calling assembly program. Make suitable assumptions, if any.

 (c) Explain the following in the context of 8086 Microprocessor (i) Creating 20 bit address using CS and IR register (ii) Uses of Flag registers in testing various conditions (iii) Indexed Addressing Modes of 8086 microprocessor